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A designer’s guide to asynchronous VLSI / Peter A. Beerel, Recep O. Ozdag, Marcos Ferretti.

By: Contributor(s): Material type: TextTextPublication details: Cambridge ; New York : Cambridge University Press, 2010.Description: xii, 339 p. : ill. ; 26 cmISBN:
  • 9780521872447
Subject(s): DDC classification:
  • 621.395   22
Contents:
Introduction -- Channel-based asynchronous design -- Modeling channel-based designs -- Pipeline performance -- Performance analysis and optimization -- Deadlock -- A taxonomy of design styles -- Synthesis-based controller design -- Micropipeline design -- Syntax-directed translation -- Quasi-delay-intensitive pipeline templates -- Timed pipeline templates -- Single-track pipeline templates -- Asynchronous crossbar -- Design example : the Fano algorith.
Summary: This book provides an introduction to this diverse area of VLSI from a designer’s point of view. Our goal is to enable designers to appreciate the many asynchronous design choices that may be readily available in the near future.
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Item type Current library Call number Copy number Status Date due Barcode
Books Books Main library General Stacks 621.395 / BE.D 2010 (Browse shelf(Opens below)) 1 Available 011821

Includes bibliographical references and index.

Introduction -- Channel-based asynchronous design -- Modeling channel-based designs -- Pipeline performance -- Performance analysis and optimization -- Deadlock -- A taxonomy of design styles -- Synthesis-based controller design -- Micropipeline design -- Syntax-directed translation -- Quasi-delay-intensitive pipeline templates -- Timed pipeline templates -- Single-track pipeline templates -- Asynchronous crossbar -- Design example : the Fano algorith.

This book provides an introduction to this diverse area of VLSI from a designer’s point of view. Our goal is to enable designers to appreciate the many asynchronous design choices that may be readily available in the near future.

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