TY  - BOOK
AU  - Beerel,Peter A.
AU  - Ozdag,Recep O.
AU  - Ferretti,Marcos
TI  - A designer’s guide to asynchronous VLSI / 
SN  - 9780521872447
U1  - 621.395   22
PY  - 2010///
CY  - Cambridge ; ,  New York : 
PB  -  Cambridge University Press, 
KW  - Integrated circuits
KW  -  Very large scale integration
KW  -  Computer-aided design
KW  -  Design and construction
N1  - Includes bibliographical references and index; Introduction -- Channel-based asynchronous design -- Modeling channel-based designs -- Pipeline performance -- Performance analysis and optimization -- Deadlock -- A taxonomy of design styles -- Synthesis-based controller design -- Micropipeline design -- Syntax-directed translation -- Quasi-delay-intensitive pipeline templates -- Timed pipeline templates -- Single-track pipeline templates -- Asynchronous crossbar -- Design example : the Fano algorith
N2  - This book provides an introduction to this diverse area of VLSI from a designer’s point of view. Our goal is to enable designers to appreciate the many asynchronous design choices that may be readily available in the near future
ER  -