TY  - BOOK
AU  -  Wile,Bruce
AU  - Goss,John C.
AU  - Roesner,W.
TI  -  Comprehensive functional verification the complete industry cycle / 
SN  -  0127518037
U1  -  621.381548   22
PY  - 2005///
CY  - Amsterdam ; ,  Boston : 
PB  -  Elsevier/Morgan Kaufmann, 
KW  - Integrated circuits
KW  -  Verification
KW  - Computer engineering
N1  - Includes bibliographical references (p. 657-662) and index; Verification in the Chip Design Process -- Verification Flow -- Fundamentals of Simulation Based Verification -- The Verification Plan -- HDLs and Simulation Engines -- Creating Environments -- Strategies for Simulation based Stimulus Generation -- Strategies for Results Checking in Simulation Based Verification -- System Reset and Bring-up -- Re-Use Strategies and System Simulation -- Completing the Verification Cycle -- Advanced Verification Techniques
ER  -