Resonant Clocking Techniques for Low Power Applications / Mohamed Wahba ElMahallawy

Supervisor: Yehea Ismail

Thesis (M.A.)—Nile University, Egypt, 2011 .

"Includes bibliographical references"

Contents:
Chapter 1: Introduction ............................................................................................. 1
Chapter 2: Resonant Clocking System ..................................................................... 5
2.1 Adiabatic Logic .............................................................................................. 5
2.1.1 Adiabatic Logic Concept ........................................................................ 5
2.1.2 Adiabatic logic families .......................................................................... 8
2.1.3 Challenges of Adiabatic Logic .............................................................. 11
2.2 Resonant Clocking Concept ......................................................................... 12
2.3 Resonant Clocking Generators ..................................................................... 17
2.3.1 Resonant Generators Analysis .............................................................. 17
2.3.2 Resonant Generators Architectures....................................................... 20
2.4 Resonant Clock Networks ............................................................................ 25
2.4.1 Rotary Travelling-Waves Oscillators Networks (RTWO) ................... 25
2.4.2 Standing Wave Oscillators Network (SWO) ........................................ 31
2.4.3 H-tree Resonant Clock Distribution...................................................... 36
2.5 Resonant Interconnects Modeling ................................................................ 42
Chapter 3: Novel Resonant Clock Generators ........................................................ 46
3.1 Switched Resonant Clock Oscillator ............................................................ 46
3.1.1 Switched Resonant Concept ................................................................. 46
3.1.2 Sizing the current path switch ............................................................... 51
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3.1.3 Sizing the compensation switch ............................................................ 54
3.1.4 Power Dissipated in the Oscillator ........................................................ 57
3.1.5 Summarizing the Design methodology ................................................. 61
3.2 Implementing the Square-Wave Resonant Clock Generator ....................... 64
3.2.1 Implementing the differential generator ............................................... 64
3.2.2 Implementing the single phase generator ............................................. 69
3.2.3 Simulations and Results ........................................................................ 71
Chapter 4: Resonant Clocking Applications........................................................... 89
4.1 Viterbi Decoder for ultra low power communications................................. 89
4.2 Implementation of ARM926EJ-S microcontroller with Resonant Clocking 92
4.3 Cell Broadband Engine Processor with Resonant Clocking ........................ 95
Chapter 5: Future Work and Summary ................................................................... 98
5.1 Future Work ................................................................................................. 98
5.1.1 Tunable Resonant Clock Generator ...................................................... 98
5.1.2 Resonant Oscillator Logic ................................................................... 101
5.2 Summary .................................................................................................... 105
References .............

Abstract:
With the huge advancement in the silicon industry accompanied by the scaling to the submicron regime leaded to exponential growth of the power density in the modern integrated circuits. Besides, the demand for mobile devices with long life batteries is increasing tremendously. Consequently, designing for low power has become mandatory to design engineers at all levels.
The most power hungry structure in the integrated systems is the clock distribution network since it is highly capacitive network carrying a signal with activity factor of 1. The power consumption for the clock network can reach from 40% to 70% in some applications.
One of the promising techniques for developing low power clock network is Resonant Clocking Technique. Resonant Clocking technique depends mainly on recycling the energy between the loads and energy storage element. This is done by adding an inductor beside the loads to form an LC oscillator to recycle the energy between them. From that perspective, the energy used in one cycle is reused in the next cycle saving a lot of power. The power drawn from the supply will be only used to compensate for the resistive losses due to inductor‘s series resistance and switches on-resistances. Also, the removal of the buffers results in better skew and jitter. Resonant Clocking techniques can reach power savings of 90% compared to conventional clock networks at some operating frequencies.
One of the challenges facing Resonant Clocking techniques is the sinusoidal waveform of the signal generated and used as a clock. Sinusoidal signals have very large transition periods compared to square waves. In this thesis, Resonant Clocking
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Generators and Distribution Networks are explained. Then, different types of square-wave resonant clock generators are introduced. These square wave generators circuits are developed along with their mathematical models and design methodology. They showed great power savings for operating frequencies below 2 GHz for 90nm TSMC technology. They are compared with other generators in the literature and proved better area and better power savings at same operating frequencies. These generators generate real square waves that can be implemented directly into today‘s‘ systems.
The thesis then highlights some full applications using Resonant Clocking techniques. Finally, it is concluded by future work to be done using square wave resonant technology in developing tunable oscillators and resonant logic family.
Square Wave Resonant Clocking Generators are very encourging to be implemented into today‘s systems because they offer huge power savings and simpler design. It is hoped that the contribution of this thesis in developing real square wave resonant generators will help circuit designers adopting the resonant clocking techniques in their near future designs.

Text in English, abstracts in English.