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Computer organization and architecture : designing for performance / William Stallings.

By: Material type: TextTextPublication details: Upper Saddle River, NJ : Pearson/Prentice Hall, c2006.Edition: 8th edDescription: 792 p. : ill. ; 25 cmISBN:
  • 9780135064177
Other title:
  • Computer organization & architecture [Cover title]
Subject(s): DDC classification:
  • 004.22   22
Contents:
Reader's Guide -- Outline of the Book -- A Roadmap For Readers and Instructors -- Why Study Computer Organization and Architecture -- Internet and Web Resources -- Overview -- Introduction -- Organization and Architecture -- Structure and Function -- Key Terms and Review Questions -- Computer Evolution and Performance -- A Brief History of Computers -- Designing for Performance -- The Evolution of the Intel x86 Architecture -- Embedded Systems and the ARM -- Performance Assessment -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- The Computer System -- A Top-Level View of Computer Function and Interconnection -- Computer Components -- Computer Function -- Interconnection Structures -- Bus Interconnection -- PCI -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- A Timing Diagrams -- Cache Memory -- Computer Memory System Overview -- Cache Memory Principles -- Elements of Cache Design -- Pentium 4 Cache Organization -- ARM Cache Organization -- Recommended Reading -- Key Terms, Review Questions, and Problems -- A Performance Characteristics of Two-Level Memorie -- Internal Memory Technology -- Semiconductor Main Memory -- Error Correction -- Advanced DRAM Organization -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- External Memory -- Magnetic Disk -- RAID -- Optical Memory -- Magnetic Tape -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Input/Output -- External Devices -- I/O Modules -- Programmed I/O -- Interrupt-Driven I/O -- Direct Memory Access -- I/O Channels and Processors -- The External Interface: FireWire and Infiniband -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Operating System Support -- Operating System Overview -- Scheduling -- Memory Management -- Pentium Memory Management -- ARM Memory Management -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Computer Arithmetic -- The Arithmetic and Logic Unit (ALU) -- Integer Representation -- Integer Arithmetic -- Floating-Point Representation -- Floating-Point Arithmetic -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Instruction Sets: Characteristics and Functions -- Machine Instruction Characteristics -- Types of Operands -- Intel x86 and ARM Data Types -- Types of Operations -- Intel x86 and ARM Operation Types -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Instruction Sets: Addressing Modes and Formats -- Addressing -- x86 and ARM Addressing Modes -- Instruction Formats -- x86 and ARM Instruction Formats -- Assembly Language -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Processor Structure and Function -- Processor Organization -- Register Organization -- The Instruction Cycle -- Instruction Pipelining -- The x86 Processor Family -- The ARM Processor -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Reduced Instruction Set Computers (RISCs) -- Instruction Execution Characteristics -- The Use of a Large Register File -- Compiler-Based Register Optimization -- Reduced Instruction Set Architecture -- RISC Pipelining -- MIPS R4000 -- SPARC -- The RISC versus CISC Controversy -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Instruction-Level Parallelism and Superscalar Processors -- Overview -- Design Issues -- Pentium 4 -- ARM Cortex-A8 -- Recommended Reading -- Key Terms, Review Questions, and Problems -- The Control Unit -- Control Unit Operation -- Micro-operations -- Control of the Processor -- Hardwired Implementation -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Microprogrammed Control -- Basic Concepts -- Microinstruction Sequencing -- Microinstruction Execution -- TI 8800 -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Parallel Organization -- Parallel Processing1 -- The Use of Multiple Processors -- Symmetric Multiprocessors -- Cache Coherence and the MESI Protocol -- Multithreading and Chip Multiprocessors -- Clusters -- Nonuniform Memory Access Computers -- Vector Computation -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Multicore Computers -- HardwarePerformance Issues -- Software Performance Issues -- Multicore Organization -- Intel x86 Multicore Organization -- ARM11 MPCore -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Projects for Teaching Computer Organization and Architecture -- Interactive Simulations -- Research Projects -- Simulation Projects -- Reading/Report Assignments -- Writing Assignments -- Test BankAppendix -- Assembly Language, Assemblers, and Compilers -- Assembly Language -- Assemblers -- Loading and Linking -- Recommended Reading and Web Site -- Key Terms, Review Questions, and Problems -- Online Chapters -- WilliamStallings.com/COA/COA8e.htm -- Number Systems -- The Decimal System -- The Binary System -- Converting between Binary and Decimal -- Hexadecimal Notation -- Key Terms, Review Questions, and Problems -- Digital Logic -- Boolean Algebra -- Gates -- Combinational Circuits -- Sequential Circuits -- Programmable Logic Devices -- Recommended Reading and Web Site -- Key Terms and Problems -- The IA-64 Architecture -- Motivation -- General Organization -- Predication and Speculation -- IA-64 Instruction Set Architecture -- Itanium Organization -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Online Appendices -- WilliamStallings.com/COA/COA8e.html -- Hash Tables -- Victim Cache -- Interleaved Memory -- International Reference Alphabet -- Virtual Memory Page Replacement Algorithms -- Recursive Procedures -- Additional Instruction Pipeline TopicsH.1 Pipeline Reservation Tables -- Reorder Buffers -- Scoreboarding -- Tomasulo's AlgorithmReferences -- Glossary -- Index -- Acronyms
Summary: For undergraduates and professionals in computer science, computer engineering, and electrical engineering courses.Learn the fundamentals of processor and computer design from the newest edition of this award winning text.Four-time winner of the best Computer Science and Engineering textbook of the year award from the Textbook and Academic Authors Association, Computer Organization and Architecture: Designing for Performance provides a thorough discussion of the fundamentals of computer organization and architecture, covering not just processor design, but memory, I/O, and parallel systems.Coverage is supported by a wealth of concrete examples emphasizing modern RISC, CISC, and superscalar systems.The eighth revision has been updated to reflect major advances in computer technology, including multicore processors and embedded processors. Interactive simulations have been expanded and keyed into relevant sections of text.
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Item type Current library Call number Copy number Status Date due Barcode
Books Books Main library General Stacks 004.22 / ST. C 2010 (Browse shelf(Opens below)) 1 Available 007269

Includes bibliographical references and index.

Reader's Guide -- Outline of the Book -- A Roadmap For Readers and Instructors -- Why Study Computer Organization and Architecture -- Internet and Web Resources -- Overview -- Introduction -- Organization and Architecture -- Structure and Function -- Key Terms and Review Questions -- Computer Evolution and Performance -- A Brief History of Computers -- Designing for Performance -- The Evolution of the Intel x86 Architecture -- Embedded Systems and the ARM -- Performance Assessment -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- The Computer System -- A Top-Level View of Computer Function and Interconnection -- Computer Components -- Computer Function -- Interconnection Structures -- Bus Interconnection -- PCI -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- A Timing Diagrams -- Cache Memory -- Computer Memory System Overview -- Cache Memory Principles -- Elements of Cache Design -- Pentium 4 Cache Organization -- ARM Cache Organization -- Recommended Reading -- Key Terms, Review Questions, and Problems -- A Performance Characteristics of Two-Level Memorie -- Internal Memory Technology -- Semiconductor Main Memory -- Error Correction -- Advanced DRAM Organization -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- External Memory -- Magnetic Disk -- RAID -- Optical Memory -- Magnetic Tape -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Input/Output -- External Devices -- I/O Modules -- Programmed I/O -- Interrupt-Driven I/O -- Direct Memory Access -- I/O Channels and Processors -- The External Interface: FireWire and Infiniband -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Operating System Support -- Operating System Overview -- Scheduling -- Memory Management -- Pentium Memory Management -- ARM Memory Management -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Computer Arithmetic -- The Arithmetic and Logic Unit (ALU) -- Integer Representation -- Integer Arithmetic -- Floating-Point Representation -- Floating-Point Arithmetic -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Instruction Sets: Characteristics and Functions -- Machine Instruction Characteristics -- Types of Operands -- Intel x86 and ARM Data Types -- Types of Operations -- Intel x86 and ARM Operation Types -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Instruction Sets: Addressing Modes and Formats -- Addressing -- x86 and ARM Addressing Modes -- Instruction Formats -- x86 and ARM Instruction Formats -- Assembly Language -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Processor Structure and Function -- Processor Organization -- Register Organization -- The Instruction Cycle -- Instruction Pipelining -- The x86 Processor Family -- The ARM Processor -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Reduced Instruction Set Computers (RISCs) -- Instruction Execution Characteristics -- The Use of a Large Register File -- Compiler-Based Register Optimization -- Reduced Instruction Set Architecture -- RISC Pipelining -- MIPS R4000 -- SPARC -- The RISC versus CISC Controversy -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Instruction-Level Parallelism and Superscalar Processors -- Overview -- Design Issues -- Pentium 4 -- ARM Cortex-A8 -- Recommended Reading -- Key Terms, Review Questions, and Problems -- The Control Unit -- Control Unit Operation -- Micro-operations -- Control of the Processor -- Hardwired Implementation -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Microprogrammed Control -- Basic Concepts -- Microinstruction Sequencing -- Microinstruction Execution -- TI 8800 -- Recommended Reading -- Key Terms, Review Questions, and Problems -- Parallel Organization -- Parallel Processing1 -- The Use of Multiple Processors -- Symmetric Multiprocessors -- Cache Coherence and the MESI Protocol -- Multithreading and Chip Multiprocessors -- Clusters -- Nonuniform Memory Access Computers -- Vector Computation -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Multicore Computers -- HardwarePerformance Issues -- Software Performance Issues -- Multicore Organization -- Intel x86 Multicore Organization -- ARM11 MPCore -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Projects for Teaching Computer Organization and Architecture -- Interactive Simulations -- Research Projects -- Simulation Projects -- Reading/Report Assignments -- Writing Assignments -- Test BankAppendix -- Assembly Language, Assemblers, and Compilers -- Assembly Language -- Assemblers -- Loading and Linking -- Recommended Reading and Web Site -- Key Terms, Review Questions, and Problems -- Online Chapters -- WilliamStallings.com/COA/COA8e.htm -- Number Systems -- The Decimal System -- The Binary System -- Converting between Binary and Decimal -- Hexadecimal Notation -- Key Terms, Review Questions, and Problems -- Digital Logic -- Boolean Algebra -- Gates -- Combinational Circuits -- Sequential Circuits -- Programmable Logic Devices -- Recommended Reading and Web Site -- Key Terms and Problems -- The IA-64 Architecture -- Motivation -- General Organization -- Predication and Speculation -- IA-64 Instruction Set Architecture -- Itanium Organization -- Recommended Reading and Web Sites -- Key Terms, Review Questions, and Problems -- Online Appendices -- WilliamStallings.com/COA/COA8e.html -- Hash Tables -- Victim Cache -- Interleaved Memory -- International Reference Alphabet -- Virtual Memory Page Replacement Algorithms -- Recursive Procedures -- Additional Instruction Pipeline TopicsH.1 Pipeline Reservation Tables -- Reorder Buffers -- Scoreboarding -- Tomasulo's AlgorithmReferences -- Glossary -- Index -- Acronyms

For undergraduates and professionals in computer science, computer engineering, and electrical engineering courses.Learn the fundamentals of processor and computer design from the newest edition of this award winning text.Four-time winner of the best Computer Science and Engineering textbook of the year award from the Textbook and Academic Authors Association, Computer Organization and Architecture: Designing for Performance provides a thorough discussion of the fundamentals of computer organization and architecture, covering not just processor design, but memory, I/O, and parallel systems.Coverage is supported by a wealth of concrete examples emphasizing modern RISC, CISC, and superscalar systems.The eighth revision has been updated to reflect major advances in computer technology, including multicore processors and embedded processors. Interactive simulations have been expanded and keyed into relevant sections of text.

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