Memristor And Inverse Memristor Emulators And Applications / (Record no. 9013)

MARC details
000 -LEADER
fixed length control field 09911nam a22002537a 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 210314b2020 a|||f mb|| 00| 0 eng d
040 ## - CATALOGING SOURCE
Original cataloging agency EG-CaNU
Transcribing agency EG-CaNU
041 0# - Language Code
Language code of text eng
Language code of abstract eng
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621
100 0# - MAIN ENTRY--PERSONAL NAME
Personal name Haneen Gamal Mohamed
245 1# - TITLE STATEMENT
Title Memristor And Inverse Memristor Emulators And Applications /
Statement of responsibility, etc. Haneen Gamal Mohamed
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Date of publication, distribution, etc. 2020
300 ## - PHYSICAL DESCRIPTION
Extent 114 p.
Other physical details ill.
Dimensions 21 cm.
500 ## - GENERAL NOTE
Materials specified Supervisor:Ahmed G. Radwan
502 ## - Dissertation Note
Dissertation type Thesis (M.A.)—Nile University, Egypt, 2020 .
504 ## - Bibliography
Bibliography "Includes bibliographical references"
505 0# - Contents
Formatted contents note Contents:<br/> CHAPTER 1 : INTRODUCTION .............................................................................. 10<br/>1.1. SCOPE ................................................................................................ 10<br/>1.2. ORGANIZATION OF THESIS .................................................................. 10<br/>CHAPTER 2 : LITERATURE SURVEY .................................................................. 12<br/>2.1. MEMRISTOR MODELS ......................................................................... 13<br/>2.1.1. Linear Ion Drift: .................................................................................... 17<br/>2.1.1.1. The frequency response of the resistance of memristors: ......................................... 18<br/>2.1.2. Non-linear Ion Drift Model: .................................................................. 20<br/>2.1.3. Simmons Tunneling Model: .................................................................. 22<br/>2.1.4. TEAM (ThrEshold Adaptive Memristor Model): ................................. 23<br/>2.1.5. VTEAM (Voltage Threshold Assisted Model) : ................................... 23<br/>2.2. WINDOW FUNCTIONS ......................................................................... 24<br/>2.2.1. Joglekar: ................................................................................................ 25<br/>2.2.1. Biolek: ................................................................................................... 25<br/>2.2.2. Strukovet. al: ......................................................................................... 27<br/>2.2.3. Benderliet. al: ........................................................................................ 28<br/>2.2.4. TEAM: .................................................................................................. 29<br/>2.2.5. Prodromakis: ......................................................................................... 30<br/>2.3. APPLICATIONS .................................................................................... 30<br/>2.3.1. Digital Applications .............................................................................. 30<br/>2.3.1. Chaotic Oscillator Circuit ...................................................................... 33<br/>2.3.2. Relaxation oscillator .............................................................................. 34<br/>CHAPTER 3 : SYMMETRIC AND ASYMMETRIC MEMRISTOR-BASED<br/>VOLTAGE CONTROLLED RELAXATION OSCILLATOR AND<br/>APPLICATIONS .......................................................................................................... 36<br/>3.1. INTRODUCTION ................................................................................... 36<br/>3.2. R-M AND M-R BASED VOLTAGE-CONTROLLED OSCILLATOR .......... 37<br/>3.2.1. Mathematical Analysis .......................................................................... 38<br/>3.2.2. R-M Voltage Based Relaxation Oscillator: (i.e. 􀀂􀀃′ = 0 ).................... 39<br/>3.2.2.1. Oscillation Condition ............................................................................................... 40<br/>3.2.2.2. Oscillation Frequency .............................................................................................. 41<br/>3.3. M -R BASED RELAXATION OSCILLATOR: (I.E. 􀀂􀀇′ = 0 ) .................... 42<br/>3.4. INTRODUCTION ................................................................................... 54<br/>3.5. SIMULATION RESULTS AND APPLICATIONS ........................................ 45<br/>3.5.1. SPICE Simulations with linear HP model ............................................. 45<br/>iii<br/>3.6. POWER CONSUMPTION OF MEMRISTOR-BASED OSCILLATOR: ............. 47<br/>3.7. SIMULATIONS WITH A NON-LINEAR EXPONENTIAL MODEL ................. 47<br/>3.8. APPLICATION: FREQUENCY MODULATOR .......................................... 51<br/>3.9. VOLTAGE-CONTROLLED ASYMMETRIC OSCILLATOR ......................... 52<br/>CHAPTER 4 : INVERSE MEMRISTOR AND ITS EMULATORS ...................... 54<br/>4.1. INVERSE MEMRISTOR MODEL ............................................................. 55<br/>4.2. MODEL OF SERIES AND PARALLEL CONNECTED NETWORKS WITH<br/>MEMRISTOR AND INVERSE MEMRISTOR ........................................................................ 56<br/>4.3. CIRCUIT IDENTIFICATION AND NUMERICAL SIMULATIONS ................. 57<br/>4.3.1. Impedance Analysis .............................................................................. 59<br/>4.4. DIFFERENT NETWORK COMBINATIONS OF MEMRISTIVE ELEMENTS<br/>FROM THE GENERAL EQUATION. ................................................................................... 61<br/>4.5. INVERSE MEMRISTOR EMULATOR ....................................................... 73<br/>4.5.1. Current-Controlled Inverse Memristor Emulator based Multiplier ....... 73<br/>4.5.2. Inverse Memristor Emulator Based Threshold ..................................... 76<br/>4.5.3. Combined Memristor- Inverse Memristor Emulator Based BJT<br/>Transistor 78<br/>4.5.4. Experimental Result .............................................................................. 79<br/>4.5.5. Discussion and Comparison .................................................................. 82<br/>4.6. INVERSE MEMCAPACITOR AND MEMINDUCTOR .................................. 82<br/>4.6.1. Inverse meminductor ............................................................................. 82<br/>4.6.1.1. Inverse meminductor mathematical model .............................................................. 82<br/>4.6.1.2. Circuit realization of Inverse meminductor model ................................................... 86<br/>CHAPTER 5 : ANALOG PWL MEMRISTOR EMULATOR ............................... 88<br/>5.1. INTRODUCTION ................................................................................... 88<br/>5.2. PROPOSED PWLM SWITCHING MODEL MEMRISTOR ......................... 89<br/>5.2.1. Two-Level PWL Switching Memristor Model ..................................... 89<br/>5.2.2. Multi-Level PWL Switching Memristor Model .................................... 91<br/>5.3. LOOP FILTER OF PHASE-LOCKED LOOP (APPLICATION) ..................... 96<br/>CHAPTER 6 : DISCUSSION AND CONCLUSIONS .............................................. 98<br/>REFERENCES ...........................................................................................................
520 3# - Abstract
Abstract Abstract:<br/>Memristor based oscillators are an essential subject of non-linear circuit theory in<br/>which relaxation oscillators can be constructed without reactive components. A family<br/>of voltage-controlled relaxation oscillators based on memristor is summed up in this<br/>thesis. The function of memristor dependent voltage control oscillator circuits is proved<br/>with mathematical modeling and circuit analysis. For the frequency and conditions of<br/>characteristic oscillation, expressions are obtained in multiple situations where a<br/>closed-form for each case is added. The effect on the frequency and conditions of the<br/>swing of circuit parameters is numerically evaluated. However, multiple transient<br/>SPICE simulations are used to test the resulting equations. With numerically analysis<br/>and SPICE simulations, the power output of each oscillator is accomplished and<br/>verified. Besides, a memristive oscillator control with a voltage allows for additional<br/>freedom in the design, which improves design versatility. To show the oscillation<br/>principle concept, the nonlinear exponential memristor model is used and tested well.<br/>For this procedure, the reference voltage influence on the output voltage is expanded<br/>using two instances of the voltage-controlled memory-based stimulation oscillator<br/>(VCO). This VCO has a small size (nanoscale) and is more compact relative to the<br/>standard storage devices.<br/>Also, three different inverse memristor emulators based on several active blocks<br/>are presented. One of the proposed emulators is realized by a second-generation current<br/>conveyor (CCII) and analog voltage multiplier with passive elements. The other two<br/>introduced emulators are designed using the current feedback operational amplifier<br/>(CFOA) with two switches or two BJT transistors. One of the proposed emulators has<br/>the advantage that it switches between the inverse memristor and memristor at the same<br/>time but in different frequencies with a smaller number of components. The introduced<br/>circuitry is simulated to validate the concept of inverse memristor showing the pinched<br/>hysteresis loop in the I-V plane. One selected emulator is verified experimentally. A<br/>comparison of the three proposed emulators is presented to highlight the number of<br/>active, passive components, and the range of frequency.<br/>Finally, an analog PWL memristor model is presented with different levels that can<br/>be implemented on an FPGA in future work and show that such an implementation can<br/>be used to generate chaos, as an example. So necessarily, it has been emulated<br/>memristor behavior using programmable transistor circuits. Then will be used this<br/>implementation as a module to mimic chaotic generators later. By using FPGAs and<br/>implementing chaotic generators will be something that has not come across before.
546 ## - Language Note
Language Note Text in English, abstracts in English.
650 #4 - Subject
Subject MSD
655 #7 - Index Term-Genre/Form
Source of term NULIB
focus term Dissertation, Academic
690 ## - Subject
School MSD
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Dewey Decimal Classification
Koha item type Thesis
650 #4 - Subject
-- 317
655 #7 - Index Term-Genre/Form
-- 187
690 ## - Subject
-- 317
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Home library Current library Date acquired Total Checkouts Full call number Date last seen Price effective from Koha item type
    Dewey Decimal Classification     Main library Main library 03/14/2021   621/ H.G.M / 2020 03/14/2021 03/14/2021 Thesis