MARC details
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
100315s2008 ne a b 001 0 eng |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
|---|
| LC control number |
2008273906 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9780123705914 (pbk.) |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(Sirsi) u5049 |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
EG-CaNU |
| Transcribing agency |
EG-CaNU |
| Modifying agency |
EG-CaNU |
| 042 ## - AUTHENTICATION CODE |
|---|
| Authentication code |
ncode |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
005.434 |
| Edition number |
22 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Herlihy, Maurice. |
| 9 (RLIN) |
10069 |
| 245 14 - TITLE STATEMENT |
|---|
| Title |
The art of multiprocessor programming / |
| Statement of responsibility, etc. |
Maurice Herlihy, Nir Shavit. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
Amsterdam ; |
| -- |
Boston : |
| Name of publisher, distributor, etc. |
Elsevier/Morgan Kaufmann, |
| Date of publication, distribution, etc. |
2008. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xx, 508 p. : |
| Other physical details |
ill. ; |
| Dimensions |
24 cm. |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
|---|
| Bibliography, etc. note |
Includes bibliographical references and index. |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
1 Introduction -- Mutual Exclusion -- Concurrent Objects and Linearization -- Foundations of Shared Memory -- The Relative Power of Synchronization Methods -- The Universality of Consensus -- Spin Locks and Contention -- Monitors and Blocking Sychronization -- Linked Lists: the Role of Locking -- Concurrent Queues and the ABA Problem -- Concurrent Stakcs and Elimination -- Counting, Sorting and Distributed Coordinatino -- Concurrent Hashing and Natural Parallelism -- Skiplists and Balanced Search -- Priority Queues -- Futures, Scheduling and Work Distribution -- Barriers -- Transactional Memory -- Appendices. |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
As the computer industry changes from single-processor to multiprocessor architectures, this revolution requires a fundamental change in how programs are written. To leverage the performance and power of multiprocessor programming, also known as multicore programming, you need to learn the new principles, algorithms, and tools presented in this book. It includes fully-developed Java examples detailing data structures, synchronization techniques, transactional memory, and more. Prof. Maurice Herlihy, who coined the phrase ";transactional memory,"; is on the faculty of Brown University. He is the recipient of the 2003 Dijkstra Prize in distributed computing. Prof. Nir Shavit is on the faculty of Tel-Aviv University and a member of the technical staff at Sun Microsystems Laboratories. In 2004 they shared the Gödel Prize, the highest award in theoretical computer science. |
| 596 ## - |
|---|
| -- |
1 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Multiprogramming (Electronic computers) |
| 9 (RLIN) |
10070 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Multiprocessors. |
| 9 (RLIN) |
8805 |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Shavit, Nir, |
| Dates associated with a name |
1959- |
| 9 (RLIN) |
10071 |
| 920 ## - |
|---|
| -- |
0123705916 (pbk.) |