The art of analog layout / (Record no. 3020)

MARC details
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 100228s2006 nju a 000 0 eng
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER
LC control number 2005048919
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780131293298
035 ## - SYSTEM CONTROL NUMBER
System control number (Sirsi) u4031
040 ## - CATALOGING SOURCE
Original cataloging agency EG-CaNU
Transcribing agency EG-CaNU
Modifying agency EG-CaNU
042 ## - AUTHENTICATION CODE
Authentication code EG-CaNU
-- EG-CaNU
-- EG-CaNU
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 22
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Hastings, Alan
Fuller form of name (Ray Alan)
9 (RLIN) 7994
245 14 - TITLE STATEMENT
Title The art of analog layout /
Statement of responsibility, etc. Alan Hastings.
250 ## - EDITION STATEMENT
Edition statement 2nd ed.
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. Upper Saddle River, NJ :
Name of publisher, distributor, etc. Pearson/Prentice Hall,
Date of publication, distribution, etc. c2006.
300 ## - PHYSICAL DESCRIPTION
Extent xxi, 648 p. :
Other physical details ill. ;
Dimensions 27 cm.
500 ## - GENERAL NOTE
General note Includes index.
505 ## - FORMATTED CONTENTS NOTE
Formatted contents note Device Physics -- Semiconductor Fabrication -- Representative Processes -- Failure Mechanisms -- Resistors -- Capacitors and Inductors -- Matching of Resistors and Capacitors -- Bipolar Transistors -- Applications of Bipolar Transistors -- Diodes -- Field-Effect Transistors -- Applications of MOS Transistors -- Assembling the Die .
520 ## - SUMMARY, ETC.
Summary, etc. For Electrical Engineering courses in analog layout or professional layout designers. This text covers the issues involved in successfully laying out analog integrated circuits. Hastings provides clear guidance and does not stress theoretical physics or mathematical analysis of layouts. He emphasizes cross- sections of devices and carrier-based models of device operation as compared to the more common geometric and schematic representation of devices.
596 ## -
-- 1
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Integrated circuits
General subdivision Design and construction.
9 (RLIN) 7995
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Layout (Printing)
9 (RLIN) 7996
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term Diodes
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term Semiconducto
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term Failure Mechanisms
920 ## -
-- 0-13-129329-X
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Home library Current library Shelving location Date acquired Source of acquisition Total Checkouts Full call number Barcode Date last seen Copy number Price effective from Koha item type
    Dewey Decimal Classification     Main library Main library General Stacks 01/26/2020 PURCHASE   621.3815 / HA.A 2006 006187 11/24/2019 1 11/24/2019 Books